1. Field of the Invention
This invention relates to an image processing device and more particularly to an image processing device which has an image enlarging function.
2. Description of the Related Art
In forming a video signal with a part thereof processed to enlarge a part of an image represented by the video signal, it has been typical to temporarily store the original video signal in a random-access memory (RAM) and then to read out the stored video signal according to a predetermined program. The conventional method is briefly described below:
The description is on the assumption that a video signal corresponding to an enlarged image as shown in FIG. 1(B) of the accompanying drawing is to be obtained from a video signal corresponding to an original image which is shown in FIG. 1(A). FIG. 2 shows by way of example the arrangement of the conventional image enlarging process circuit. FIGS. 3(A) and 3(B) show the operation of the circuit of FIG. 2.
Referring to FIG. 2, an analog video signal for the original image is supplied through an input terminal 20. The input signal is converted into a digital signal by an A/D (analog-to-digital) converter 21. The digital signal is supplied to a field memory 22 which is composed of a RAM. As shown in FIG. 3(B), the storage areas within the field memory 22 are in one-to-one correspondence with each picture element of the image represented by the input digital video signal, as shown in FIG. 3(B). The input signal is written into applicable storage areas in accordance with designated writing addresses. In reading the stored digital video signal out from the field memory 22, the image can be enlarged in the following manner: To enlarge the middle part of it by two times, for example, the areas of addresses 3-3, 3-4, 4-3, 4-4 which store the digital video signal parts corresponding to the picture elements of the middle part of the image are scanned twice in both the horizontal and vertical directions in such a manner as "3-3", "3-3", "3-4", "3-4", ----, as shown in FIG. 3(A). Again referring to FIG. 2, this address control is accomplished in synchronism with the A/D converter 21 and a D/A (digital-to-analog) converter 23 by an address control circuit 24. This circuit 24 operates in accordance with a timing signal output from a timing control signal generating circuit 25. In FIG. 2, a reference symbol W denotes a writing address control signal which controls the process for writing into the field memory 22. Another reference symbol R denotes a reading address control signal which controls the process of reading from the field memory 22. A digital video signal read out from the field memory 22 is supplied to the D/A converter 23 to be converted into an analog video signal which corresponds to the desired enlarged image.
Meanwhile, a method of using the so-called first-in/first-out (hereinafter referred to as FIFO) memory for the above-stated enlarging process has been disclosed in U.S. patent application Ser. No. 300,931.
Generally, an enlarged image which is obtained in the above-stated manner is solely displayed. However, it is conceivable to display it in combination with other images. Such a combined display process, however, necessitates a large circuit arrangement including, among others, a processing circuit for forming a video signal corresponding to the enlarged image; a processing circuit for forming a video signal corresponding to a composite image consisting of the enlarged image and another image; a designation circuit for designating a point of the original image to be located in the middle of the enlarged image; and a designation circuit for designating an image combining pattern to be used in combining images. Such circuit arrangement thus requires many and various designating instructions. However, giving such instructions is highly troublesome for an ordinary operator. Hence, the above-stated enlarged-image combining display function has been limited to business appliances and not provided in the general consumer appliances.